// Copyright (C) 1953-2022 NUDT
// Verilog module name - initiator_packet_process
// Version: V4.1.0.20221206
// Created:
//         by - fenglin
////////////////////////////////////////////////////////////////////////////
// Description:
//         
///////////////////////////////////////////////////////////////////////////

`timescale 1ns/1ps

module initiator_packet_process #(parameter local_module_id = 12'd0)
(
    i_clk  ,
    i_rst_n,
	
	iv_measure_responder_wait_time        ,
	iv_port_ptp_enabled                   ,
								          
	i_measure_req                         ,
	
	iv_hcp_mid                            ,
    
    iv_data                               ,
	i_data_wr                             ,
	iv_eth_type                           ,
	iv_tsmp_type                          ,
	iv_tsmp_subtype                       ,
	iv_port_id                            ,

	ov_data                               ,
	o_data_wr                             ,
	ov_measure_port_id                    ,
    o_first_byte_valid                    ,
	
	ov_measure_req_tx_cnt_p0              ,
	ov_measure_resp_rx_timeout_cnt_p0     ,	
	ov_measure_req_tx_cnt_p1              ,
	ov_measure_resp_rx_timeout_cnt_p1     ,	
	ov_measure_req_tx_cnt_p2              ,
	ov_measure_resp_rx_timeout_cnt_p2     ,	
	ov_measure_req_tx_cnt_p3              ,
	ov_measure_resp_rx_timeout_cnt_p3     ,	
	ov_measure_req_tx_cnt_p4              ,
	ov_measure_resp_rx_timeout_cnt_p4     ,	
	ov_measure_req_tx_cnt_p5              ,
	ov_measure_resp_rx_timeout_cnt_p5     ,	
	ov_measure_req_tx_cnt_p6              ,
	ov_measure_resp_rx_timeout_cnt_p6     ,	
	ov_measure_req_tx_cnt_p7              ,
	ov_measure_resp_rx_timeout_cnt_p7     ,	
	ov_measure_req_tx_cnt_p8              ,
	ov_measure_resp_rx_timeout_cnt_p8     ,	
	ov_measure_req_tx_cnt_p9              ,
	ov_measure_resp_rx_timeout_cnt_p9     ,	
	ov_measure_req_tx_cnt_p10             ,
	ov_measure_resp_rx_timeout_cnt_p10    ,	
	ov_measure_req_tx_cnt_p11             ,
	ov_measure_resp_rx_timeout_cnt_p11    ,	
	ov_measure_req_tx_cnt_p12             ,
	ov_measure_resp_rx_timeout_cnt_p12    ,	
	ov_measure_req_tx_cnt_p13             ,
	ov_measure_resp_rx_timeout_cnt_p13    ,	
	ov_measure_req_tx_cnt_p14             ,
	ov_measure_resp_rx_timeout_cnt_p14    ,	
	ov_measure_req_tx_cnt_p15             ,
	ov_measure_resp_rx_timeout_cnt_p15    ,	
	ov_measure_req_tx_cnt_p16             ,
	ov_measure_resp_rx_timeout_cnt_p16    ,	
	ov_measure_req_tx_cnt_p17             ,
	ov_measure_resp_rx_timeout_cnt_p17    ,	
	ov_measure_req_tx_cnt_p18             ,
	ov_measure_resp_rx_timeout_cnt_p18    ,	
	ov_measure_req_tx_cnt_p19             ,
	ov_measure_resp_rx_timeout_cnt_p19    ,	
	ov_measure_req_tx_cnt_p20             ,
	ov_measure_resp_rx_timeout_cnt_p20    ,	
	ov_measure_req_tx_cnt_p21             ,
	ov_measure_resp_rx_timeout_cnt_p21    ,	
	ov_measure_req_tx_cnt_p22             ,
	ov_measure_resp_rx_timeout_cnt_p22    ,	
	ov_measure_req_tx_cnt_p23             ,
	ov_measure_resp_rx_timeout_cnt_p23    ,
    ov_measure_req_tx_cnt_p24             ,
	ov_measure_resp_rx_timeout_cnt_p24    ,
    ov_measure_req_tx_cnt_p25             ,
	ov_measure_resp_rx_timeout_cnt_p25    ,
	ov_measure_req_tx_cnt_p26             ,
	ov_measure_resp_rx_timeout_cnt_p26    ,
	ov_measure_req_tx_cnt_p27             ,
	ov_measure_resp_rx_timeout_cnt_p27    ,
	ov_measure_req_tx_cnt_p28             ,
	ov_measure_resp_rx_timeout_cnt_p28    ,
	ov_measure_req_tx_cnt_p29             ,
	ov_measure_resp_rx_timeout_cnt_p29    ,
	ov_measure_req_tx_cnt_p30             ,
	ov_measure_resp_rx_timeout_cnt_p30    ,
	ov_measure_req_tx_cnt_p31             ,
	ov_measure_resp_rx_timeout_cnt_p31    ,	
    
	ov_t2                                 ,
	ov_t3                                 ,
	o_t2_wr                               ,
	o_t3_wr                               ,
    
    ov_req_sequence                       
);

// I/O
// clk & rst
input                   i_clk;
input                   i_rst_n; 
// pkt input
input	   [2:0]        iv_measure_responder_wait_time        ;
input	   [31:0]       iv_port_ptp_enabled                   ;
		                						          
input	                i_measure_req                         ;

input      [11:0]       iv_hcp_mid     ;

input	   [8:0]	    iv_data        ;
input	         	    i_data_wr      ;
input	   [15:0]    	iv_eth_type    ;
input	   [7:0]    	iv_tsmp_type   ;
input	   [7:0]    	iv_tsmp_subtype;
input	   [7:0]    	iv_port_id     ;
// pkt output to NMA
output reg [8:0]	    ov_data        ;
output reg	            o_data_wr      ;
output reg[4:0]         ov_measure_port_id     ;
output reg              o_first_byte_valid     ;
// pkt output to osp
output reg [15:0]       ov_measure_req_tx_cnt_p0              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p0     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p1              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p1     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p2              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p2     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p3              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p3     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p4              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p4     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p5              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p5     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p6              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p6     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p7              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p7     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p8              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p8     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p9              ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p9     ;	
output reg [15:0]       ov_measure_req_tx_cnt_p10             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p10    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p11             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p11    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p12             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p12    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p13             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p13    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p14             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p14    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p15             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p15    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p16             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p16    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p17             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p17    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p18             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p18    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p19             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p19    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p20             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p20    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p21             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p21    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p22             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p22    ;	
output reg [15:0]       ov_measure_req_tx_cnt_p23             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p23    ;
output reg [15:0]       ov_measure_req_tx_cnt_p24             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p24    ;
output reg [15:0]       ov_measure_req_tx_cnt_p25             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p25    ;
output reg [15:0]       ov_measure_req_tx_cnt_p26             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p26    ;
output reg [15:0]       ov_measure_req_tx_cnt_p27             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p27    ;
output reg [15:0]       ov_measure_req_tx_cnt_p28             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p28    ;
output reg [15:0]       ov_measure_req_tx_cnt_p29             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p29    ;
output reg [15:0]       ov_measure_req_tx_cnt_p30             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p30    ;
output reg [15:0]       ov_measure_req_tx_cnt_p31             ;
output reg [15:0]       ov_measure_resp_rx_timeout_cnt_p31    ;	
// pkt output to pip
output reg [79:0]	    ov_t2            ;
output reg [79:0]       ov_t3            ;
output reg              o_t2_wr          ;
output reg              o_t3_wr          ;

output reg[15:0]        ov_req_sequence        ;
//***************************************************
//               packet process
//***************************************************
reg       [31:0]              rv_port_ptp_enabled    ;

reg       [6:0]               rv_cycle_cnt;   
reg       [9:0]               rv_us_cnt   ;   
reg       [15:0]              rv_ms_cnt   ; 

reg       [7:0]               rv_byte_cnt            ;
reg       [3:0]               rv_ipp_state           ;
localparam      IDLE_S                          = 4'd0,
                SELECT_MEASURE_PORT_S           = 4'd1,
                GENERATE_REQ_S                  = 4'd2,
                WAIT_RESP_S                     = 4'd3,
				WAIT_RESP_TIMEOUT_S             = 4'd4,
				RECEIVE_RESP_ERROR_S            = 4'd5,
                RECEIVE_RESP_S                  = 4'd6,
				WAIT_RESP_FOLLOW_UP_S           = 4'd7,
				WAIT_RESP_FOLLOW_UP_TIMEOUT_S   = 4'd8,
			    RECEIVE_RESP_FOLLOW_UP_ERROR_S  = 4'd9,
				RECEIVE_RESP_FOLLOW_UP_S        = 4'd10;
always @(posedge i_clk or negedge i_rst_n) begin
    if(!i_rst_n)begin
        ov_req_sequence     <= 16'b0;
		rv_port_ptp_enabled <= 32'b0;
		ov_measure_port_id  <= 5'b0 ;
        o_first_byte_valid  <= 1'b0 ;
		
		rv_cycle_cnt        <= 7'b0  ;
		rv_us_cnt           <= 10'b0 ;
		rv_ms_cnt           <= 16'b0 ;
		
		rv_byte_cnt         <= 8'b0 ;
		
		ov_data         <= 9'b0;
        o_data_wr       <= 1'b0;

        ov_t2           <= 80'b0;
        ov_t3           <= 80'b0;
        o_t2_wr         <= 1'b0 ;
        o_t3_wr         <= 1'b0 ;
        
        ov_measure_req_tx_cnt_p0           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p0  <= 16'b0   ;
        ov_measure_req_tx_cnt_p1           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p1  <= 16'b0   ;
        ov_measure_req_tx_cnt_p2           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p2  <= 16'b0   ;
        ov_measure_req_tx_cnt_p3           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p3  <= 16'b0   ;
        ov_measure_req_tx_cnt_p4           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p4  <= 16'b0   ;
        ov_measure_req_tx_cnt_p5           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p5  <= 16'b0   ;
        ov_measure_req_tx_cnt_p6           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p6  <= 16'b0   ;
        ov_measure_req_tx_cnt_p7           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p7  <= 16'b0   ;
        ov_measure_req_tx_cnt_p8           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p8  <= 16'b0   ;
        ov_measure_req_tx_cnt_p9           <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p9  <= 16'b0   ;
        ov_measure_req_tx_cnt_p10          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p10 <= 16'b0   ;
        ov_measure_req_tx_cnt_p11          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p11 <= 16'b0   ;
        ov_measure_req_tx_cnt_p12          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p12 <= 16'b0   ;
        ov_measure_req_tx_cnt_p13          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p13 <= 16'b0   ;
        ov_measure_req_tx_cnt_p14          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p14 <= 16'b0   ;
        ov_measure_req_tx_cnt_p15          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p15 <= 16'b0   ;
        ov_measure_req_tx_cnt_p16          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p16 <= 16'b0   ;
        ov_measure_req_tx_cnt_p17          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p17 <= 16'b0   ;
        ov_measure_req_tx_cnt_p18          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p18 <= 16'b0   ;
        ov_measure_req_tx_cnt_p19          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p19 <= 16'b0   ;
        ov_measure_req_tx_cnt_p20          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p20 <= 16'b0   ;
        ov_measure_req_tx_cnt_p21          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p21 <= 16'b0   ;
        ov_measure_req_tx_cnt_p22          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p22 <= 16'b0   ;
        ov_measure_req_tx_cnt_p23          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p23 <= 16'b0   ;
        ov_measure_req_tx_cnt_p24          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p24 <= 16'b0   ;
        ov_measure_req_tx_cnt_p25          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p25 <= 16'b0   ;
        ov_measure_req_tx_cnt_p26          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p26 <= 16'b0   ;
        ov_measure_req_tx_cnt_p27          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p27 <= 16'b0   ;
        ov_measure_req_tx_cnt_p28          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p28 <= 16'b0   ;
        ov_measure_req_tx_cnt_p29          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p29 <= 16'b0   ;
        ov_measure_req_tx_cnt_p30          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p30 <= 16'b0   ;
        ov_measure_req_tx_cnt_p31          <= 16'b0   ;
        ov_measure_resp_rx_timeout_cnt_p31 <= 16'b0   ;

        rv_ipp_state   <= IDLE_S;        
    end
    else begin
        case(rv_ipp_state)
            IDLE_S:begin
				rv_cycle_cnt        <= 7'b0  ;
				rv_us_cnt           <= 10'b0 ;
				rv_ms_cnt           <= 16'b0 ;			
			
				rv_byte_cnt         <= 8'b0;
				ov_measure_port_id  <= 5'b0 ;
				o_first_byte_valid  <= 1'b0 ;
				ov_data         <= 9'b0;
				o_data_wr       <= 1'b0;

				ov_t2           <= 80'b0;
				ov_t3           <= 80'b0;
				o_t2_wr         <= 1'b0 ;
				o_t3_wr         <= 1'b0 ;				
				if((|iv_port_ptp_enabled) && (i_measure_req))begin//
					ov_req_sequence     <= ov_req_sequence + 1'b1;
					rv_port_ptp_enabled <= iv_port_ptp_enabled;
					rv_ipp_state        <= SELECT_MEASURE_PORT_S;  
				end
				else begin
					rv_ipp_state    <= IDLE_S;  
				end                    
            end
			SELECT_MEASURE_PORT_S:begin
				rv_cycle_cnt        <= 7'b0  ;
				rv_us_cnt           <= 10'b0 ;
				rv_ms_cnt           <= 16'b0 ;			
			
			    if(rv_port_ptp_enabled[0])begin
				    ov_measure_port_id       <= 5'd0 ;
					rv_port_ptp_enabled[0]   <= 1'b0 ;
					ov_measure_req_tx_cnt_p0 <= ov_measure_req_tx_cnt_p0 + 1'b1;
                    rv_ipp_state             <= GENERATE_REQ_S;  
				end
				else if(rv_port_ptp_enabled[1])begin
				    ov_measure_port_id       <= 5'd1 ;
					rv_port_ptp_enabled[1]   <= 1'b0 ;
					ov_measure_req_tx_cnt_p1 <= ov_measure_req_tx_cnt_p1 + 1'b1;
                    rv_ipp_state             <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[2])begin
				    ov_measure_port_id     <= 5'd2 ;
					rv_port_ptp_enabled[2] <= 1'b0 ;
					ov_measure_req_tx_cnt_p2 <= ov_measure_req_tx_cnt_p2 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[3])begin
				    ov_measure_port_id     <= 5'd3 ;
					rv_port_ptp_enabled[3] <= 1'b0 ;
					ov_measure_req_tx_cnt_p3 <= ov_measure_req_tx_cnt_p3 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[4])begin
				    ov_measure_port_id     <= 5'd4 ;
					rv_port_ptp_enabled[4] <= 1'b0 ;
					ov_measure_req_tx_cnt_p4 <= ov_measure_req_tx_cnt_p4 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[5])begin
				    ov_measure_port_id     <= 5'd5 ;
					rv_port_ptp_enabled[5] <= 1'b0 ;
					ov_measure_req_tx_cnt_p5 <= ov_measure_req_tx_cnt_p5 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[6])begin
				    ov_measure_port_id     <= 5'd6 ;
					rv_port_ptp_enabled[6] <= 1'b0 ;
					ov_measure_req_tx_cnt_p6 <= ov_measure_req_tx_cnt_p6 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[7])begin
				    ov_measure_port_id     <= 5'd7 ;
					rv_port_ptp_enabled[7] <= 1'b0 ;
					ov_measure_req_tx_cnt_p7 <= ov_measure_req_tx_cnt_p7 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[8])begin
				    ov_measure_port_id     <= 5'd8 ;
					rv_port_ptp_enabled[8] <= 1'b0 ;
					ov_measure_req_tx_cnt_p8 <= ov_measure_req_tx_cnt_p8 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[9])begin
				    ov_measure_port_id     <= 5'd9 ;
					rv_port_ptp_enabled[9] <= 1'b0 ;
					ov_measure_req_tx_cnt_p9 <= ov_measure_req_tx_cnt_p9 + 1'b1;
                    rv_ipp_state           <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[10])begin
				    ov_measure_port_id      <= 5'd10 ;
					rv_port_ptp_enabled[10] <= 1'b0  ;
					ov_measure_req_tx_cnt_p10 <= ov_measure_req_tx_cnt_p10 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[11])begin
				    ov_measure_port_id      <= 5'd11 ;
					rv_port_ptp_enabled[11] <= 1'b0  ;
					ov_measure_req_tx_cnt_p11 <= ov_measure_req_tx_cnt_p11 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S; 
				end
				else if(rv_port_ptp_enabled[12])begin
				    ov_measure_port_id      <= 5'd12 ;
					rv_port_ptp_enabled[12] <= 1'b0 ;
					ov_measure_req_tx_cnt_p12 <= ov_measure_req_tx_cnt_p12 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[13])begin
				    ov_measure_port_id      <= 5'd13 ;
					rv_port_ptp_enabled[13] <= 1'b0 ;
					ov_measure_req_tx_cnt_p13 <= ov_measure_req_tx_cnt_p13 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[14])begin
				    ov_measure_port_id      <= 5'd14 ;
					rv_port_ptp_enabled[14] <= 1'b0 ;
					ov_measure_req_tx_cnt_p14 <= ov_measure_req_tx_cnt_p14 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[15])begin
				    ov_measure_port_id      <= 5'd15 ;
					rv_port_ptp_enabled[15] <= 1'b0 ;
					ov_measure_req_tx_cnt_p15 <= ov_measure_req_tx_cnt_p15 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[16])begin
				    ov_measure_port_id      <= 5'd16 ;
					rv_port_ptp_enabled[16] <= 1'b0 ;
					ov_measure_req_tx_cnt_p16 <= ov_measure_req_tx_cnt_p16 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[17])begin
				    ov_measure_port_id      <= 5'd17 ;
					rv_port_ptp_enabled[17] <= 1'b0 ;
					ov_measure_req_tx_cnt_p17 <= ov_measure_req_tx_cnt_p17 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[18])begin
				    ov_measure_port_id      <= 5'd18 ;
					rv_port_ptp_enabled[18] <= 1'b0 ;
					ov_measure_req_tx_cnt_p18 <= ov_measure_req_tx_cnt_p18 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[19])begin
				    ov_measure_port_id      <= 5'd19 ;
					rv_port_ptp_enabled[19] <= 1'b0 ;
                    ov_measure_req_tx_cnt_p19 <= ov_measure_req_tx_cnt_p19 + 1'b1;
					rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[20])begin
				    ov_measure_port_id      <= 5'd20 ;
					rv_port_ptp_enabled[20] <= 1'b0 ;
					ov_measure_req_tx_cnt_p20 <= ov_measure_req_tx_cnt_p20 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[21])begin
				    ov_measure_port_id      <= 5'd21 ;
					rv_port_ptp_enabled[21] <= 1'b0 ;
					ov_measure_req_tx_cnt_p21 <= ov_measure_req_tx_cnt_p21 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[22])begin
				    ov_measure_port_id      <= 5'd22 ;
					rv_port_ptp_enabled[22] <= 1'b0 ;
					ov_measure_req_tx_cnt_p22 <= ov_measure_req_tx_cnt_p22 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[23])begin
				    ov_measure_port_id      <= 5'd23 ;
					rv_port_ptp_enabled[23] <= 1'b0 ;
					ov_measure_req_tx_cnt_p23 <= ov_measure_req_tx_cnt_p23 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[24])begin
				    ov_measure_port_id      <= 5'd24 ;
					rv_port_ptp_enabled[24] <= 1'b0 ;
					ov_measure_req_tx_cnt_p24 <= ov_measure_req_tx_cnt_p24 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[25])begin
				    ov_measure_port_id      <= 5'd25 ;
					rv_port_ptp_enabled[25] <= 1'b0 ;
					ov_measure_req_tx_cnt_p25 <= ov_measure_req_tx_cnt_p25 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[26])begin
				    ov_measure_port_id      <= 5'd26 ;
					rv_port_ptp_enabled[26] <= 1'b0 ;
					ov_measure_req_tx_cnt_p26 <= ov_measure_req_tx_cnt_p26 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[27])begin
				    ov_measure_port_id      <= 5'd27 ;
					rv_port_ptp_enabled[27] <= 1'b0 ;
					ov_measure_req_tx_cnt_p27 <= ov_measure_req_tx_cnt_p27 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[28])begin
				    ov_measure_port_id      <= 5'd28 ;
					rv_port_ptp_enabled[28] <= 1'b0 ;
					ov_measure_req_tx_cnt_p28 <= ov_measure_req_tx_cnt_p28 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[29])begin
				    ov_measure_port_id      <= 5'd29 ;
					rv_port_ptp_enabled[29] <= 1'b0 ;
                    ov_measure_req_tx_cnt_p29 <= ov_measure_req_tx_cnt_p29 + 1'b1;
					rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[30])begin
				    ov_measure_port_id      <= 5'd30 ;
					rv_port_ptp_enabled[30] <= 1'b0 ;
					ov_measure_req_tx_cnt_p30 <= ov_measure_req_tx_cnt_p30 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else if(rv_port_ptp_enabled[31])begin
				    ov_measure_port_id      <= 5'd31 ;
					rv_port_ptp_enabled[31] <= 1'b0 ;
					ov_measure_req_tx_cnt_p31 <= ov_measure_req_tx_cnt_p31 + 1'b1;
                    rv_ipp_state            <= GENERATE_REQ_S;
				end
				else begin
				    ov_measure_port_id  <= ov_measure_port_id ;
					rv_ipp_state        <= IDLE_S;
				end							
			end
            GENERATE_REQ_S:begin
				ov_t2           <= 80'b0;
				ov_t3           <= 80'b0;
				o_t2_wr         <= 1'b0 ;
				o_t3_wr         <= 1'b0 ;	           
                rv_byte_cnt     <= rv_byte_cnt + 1'b1;
				
				o_data_wr       <= 1'b1;
				case(rv_byte_cnt)
				    //dmac
				    8'd0:begin
                        ov_data             <= {1'b1,8'h01};
                        o_first_byte_valid  <= 1'b1 ;
                    end
                    8'd1:begin
                        ov_data             <= {1'b0,8'h80};
                        o_first_byte_valid  <= 1'b0 ;
                    end
					8'd2:ov_data          <= {1'b0,8'hC2};
					8'd3:ov_data          <= {1'b0,8'h00};
					8'd4:ov_data          <= {1'b0,8'h00};
					8'd5:ov_data          <= {1'b0,8'h0E};
					//smac                
					8'd6:ov_data          <= {1'b0, 8'h66};
					8'd7:ov_data          <= {1'b0, 8'h26};
					8'd8:ov_data          <= {1'b0, 8'h62};
					8'd9:ov_data          <= {1'b0, iv_hcp_mid[11:4]                      };
					8'd10:ov_data         <= {1'b0, iv_hcp_mid[3:0 ],local_module_id[11:8]};
					8'd11:ov_data         <= {1'b0, local_module_id[7:0  ]                };
					//eth type
					8'd12:ov_data         <= {1'b0,8'h88};
					8'd13:ov_data         <= {1'b0,8'hF7};
					//majorSdoId,messageType
					8'd14:ov_data         <= {1'b0,4'h2,4'h2};
					//minorVersionPTP,versionPTP
					8'd15:ov_data         <= {1'b0,4'h0,4'h2};
					//messageLength
					8'd16:ov_data         <= {1'b0,8'h00};
					8'd17:ov_data         <= {1'b0,8'd54};
					//domainNumber
					8'd18:ov_data         <= {1'b0,8'h00};
					//minorSdoId
					8'd19:ov_data         <= {1'b0,8'h00};
					//Flags
					8'd20:ov_data         <= {1'b0,8'h00};
					8'd21:ov_data         <= {1'b0,8'h08};
					//correctionField
					8'd22:ov_data         <= {1'b0,8'h00};
					8'd23:ov_data         <= {1'b0,8'h00};
					8'd24:ov_data         <= {1'b0,8'h00};
					8'd25:ov_data         <= {1'b0,8'h00};
					8'd26:ov_data         <= {1'b0,8'h00};
					8'd27:ov_data         <= {1'b0,8'h00};
					8'd28:ov_data         <= {1'b0,8'h00};
					8'd29:ov_data         <= {1'b0,8'h00};
					//messageTypeSpecific
					8'd30:ov_data         <= {1'b0,8'h00};
					8'd31:ov_data         <= {1'b0,8'h00};
					8'd32:ov_data         <= {1'b0,8'h00};
					8'd33:ov_data         <= {1'b0,8'h00};
					//SourcePortIdentity
                    8'd34:ov_data         <= {1'b0,8'h66};
					8'd35:ov_data         <= {1'b0,8'h26};
					8'd36:ov_data         <= {1'b0,8'h62};
					8'd37:ov_data         <= {1'b0,8'hFF};
					8'd38:ov_data         <= {1'b0,8'hFE};
					8'd39:ov_data         <= {1'b0,iv_hcp_mid[11:4]                      };
					8'd40:ov_data         <= {1'b0,iv_hcp_mid[3:0 ],local_module_id[11:8]};
					8'd41:ov_data         <= {1'b0,local_module_id[7:0  ]                };
					8'd42:ov_data         <= {1'b0,8'h00};
					8'd43:ov_data         <= {1'b0,ov_measure_port_id};
					//sequenceId
                    8'd44:ov_data         <= {1'b0,ov_req_sequence[15:8]};
					8'd45:ov_data         <= {1'b0,ov_req_sequence[7:0] };
                    //controlField
					8'd46:ov_data         <= {1'b0,8'h05};
					//logMessageInterval
					8'd47:ov_data         <= {1'b0,8'd127};
					//reserved
					8'd48:ov_data         <= {1'b0,8'h00};
					8'd49:ov_data         <= {1'b0,8'h00};
					8'd50:ov_data         <= {1'b0,8'h00};
					8'd51:ov_data         <= {1'b0,8'h00};
					8'd52:ov_data         <= {1'b0,8'h00};
					8'd53:ov_data         <= {1'b0,8'h00};
					8'd54:ov_data         <= {1'b0,8'h00};
					8'd55:ov_data         <= {1'b0,8'h00};
					8'd56:ov_data         <= {1'b0,8'h00};
					8'd57:ov_data         <= {1'b0,8'h00};
					//reserved
					8'd58:ov_data         <= {1'b0,8'h00};
					8'd59:ov_data         <= {1'b0,8'h00};
					8'd60:ov_data         <= {1'b0,8'h00};
					8'd61:ov_data         <= {1'b0,8'h00};
					8'd62:ov_data         <= {1'b0,8'h00};
					8'd63:ov_data         <= {1'b0,8'h00};
					8'd64:ov_data         <= {1'b0,8'h00};
					8'd65:ov_data         <= {1'b0,8'h00};
					8'd66:ov_data         <= {1'b0,8'h00};
					8'd67:begin
					    ov_data         <= {1'b1,8'h00};
						rv_ipp_state    <= WAIT_RESP_S;
				    end  
                endcase
            end
			WAIT_RESP_S:begin
				ov_data         <= 9'b0;
				o_data_wr       <= 1'b0;

				if(rv_cycle_cnt >= 7'd124)begin
					rv_cycle_cnt <= 7'd0;
				end
				else begin
					rv_cycle_cnt <= rv_cycle_cnt + 7'd1;
				end	

				if(rv_us_cnt >= 10'd999)begin
					rv_us_cnt <= 10'd0;
				end
				else begin
					if(rv_cycle_cnt >= 7'd124)begin
						rv_us_cnt <= rv_us_cnt + 1'd1;
					end
					else begin
						rv_us_cnt <= rv_us_cnt;
					end
				end

				if(rv_us_cnt >= 10'd999)begin
					rv_ms_cnt <= rv_ms_cnt + 1'd1;
				end
				else begin
					rv_ms_cnt <= rv_ms_cnt;
				end	
				
				if(rv_ms_cnt <= (8'd1 << iv_measure_responder_wait_time))begin
					if(i_data_wr)begin				
					    if((iv_eth_type == 16'hff01) && (iv_tsmp_type == 8'h06) && (iv_tsmp_subtype == 8'h03) && (iv_port_id == {3'b0,ov_measure_port_id}))begin				
							rv_byte_cnt     <= 8'b1;
							rv_ipp_state    <= RECEIVE_RESP_S;
						end
						else begin
						    rv_byte_cnt     <= 8'b0;
							rv_ipp_state    <= RECEIVE_RESP_ERROR_S;
						end
					end
					else begin			
				        rv_byte_cnt     <= 8'b0;
					    rv_ipp_state    <= WAIT_RESP_S;
					end
				end
				else begin
				    rv_byte_cnt     <= 8'b0;
			        rv_ipp_state    <= WAIT_RESP_TIMEOUT_S;
				end				
			end
			WAIT_RESP_TIMEOUT_S:begin
			    case(ov_measure_port_id)
                    5'd0 :ov_measure_resp_rx_timeout_cnt_p0  <= ov_measure_resp_rx_timeout_cnt_p0  + 1'b1;
                    5'd1 :ov_measure_resp_rx_timeout_cnt_p1  <= ov_measure_resp_rx_timeout_cnt_p1  + 1'b1;
                    5'd2 :ov_measure_resp_rx_timeout_cnt_p2  <= ov_measure_resp_rx_timeout_cnt_p2  + 1'b1;
                    5'd3 :ov_measure_resp_rx_timeout_cnt_p3  <= ov_measure_resp_rx_timeout_cnt_p3  + 1'b1;
                    5'd4 :ov_measure_resp_rx_timeout_cnt_p4  <= ov_measure_resp_rx_timeout_cnt_p4  + 1'b1;
                    5'd5 :ov_measure_resp_rx_timeout_cnt_p5  <= ov_measure_resp_rx_timeout_cnt_p5  + 1'b1;
                    5'd6 :ov_measure_resp_rx_timeout_cnt_p6  <= ov_measure_resp_rx_timeout_cnt_p6  + 1'b1;
                    5'd7 :ov_measure_resp_rx_timeout_cnt_p7  <= ov_measure_resp_rx_timeout_cnt_p7  + 1'b1;
                    5'd8 :ov_measure_resp_rx_timeout_cnt_p8  <= ov_measure_resp_rx_timeout_cnt_p8  + 1'b1;
                    5'd9 :ov_measure_resp_rx_timeout_cnt_p9  <= ov_measure_resp_rx_timeout_cnt_p9  + 1'b1;
                    5'd10:ov_measure_resp_rx_timeout_cnt_p10 <= ov_measure_resp_rx_timeout_cnt_p10 + 1'b1;
                    5'd11:ov_measure_resp_rx_timeout_cnt_p11 <= ov_measure_resp_rx_timeout_cnt_p11 + 1'b1;
                    5'd12:ov_measure_resp_rx_timeout_cnt_p12 <= ov_measure_resp_rx_timeout_cnt_p12 + 1'b1;
                    5'd13:ov_measure_resp_rx_timeout_cnt_p13 <= ov_measure_resp_rx_timeout_cnt_p13 + 1'b1;
                    5'd14:ov_measure_resp_rx_timeout_cnt_p14 <= ov_measure_resp_rx_timeout_cnt_p14 + 1'b1;
                    5'd15:ov_measure_resp_rx_timeout_cnt_p15 <= ov_measure_resp_rx_timeout_cnt_p15 + 1'b1;
                    5'd16:ov_measure_resp_rx_timeout_cnt_p16 <= ov_measure_resp_rx_timeout_cnt_p16 + 1'b1;
                    5'd17:ov_measure_resp_rx_timeout_cnt_p17 <= ov_measure_resp_rx_timeout_cnt_p17 + 1'b1;
                    5'd18:ov_measure_resp_rx_timeout_cnt_p18 <= ov_measure_resp_rx_timeout_cnt_p18 + 1'b1;
                    5'd19:ov_measure_resp_rx_timeout_cnt_p19 <= ov_measure_resp_rx_timeout_cnt_p19 + 1'b1;
                    5'd20:ov_measure_resp_rx_timeout_cnt_p20 <= ov_measure_resp_rx_timeout_cnt_p20 + 1'b1;
                    5'd21:ov_measure_resp_rx_timeout_cnt_p21 <= ov_measure_resp_rx_timeout_cnt_p21 + 1'b1;
                    5'd22:ov_measure_resp_rx_timeout_cnt_p22 <= ov_measure_resp_rx_timeout_cnt_p22 + 1'b1;
                    5'd23:ov_measure_resp_rx_timeout_cnt_p23 <= ov_measure_resp_rx_timeout_cnt_p23 + 1'b1;
                    5'd24:ov_measure_resp_rx_timeout_cnt_p24 <= ov_measure_resp_rx_timeout_cnt_p24 + 1'b1;
                    5'd25:ov_measure_resp_rx_timeout_cnt_p25 <= ov_measure_resp_rx_timeout_cnt_p25 + 1'b1;
                    5'd26:ov_measure_resp_rx_timeout_cnt_p26 <= ov_measure_resp_rx_timeout_cnt_p26 + 1'b1;
                    5'd27:ov_measure_resp_rx_timeout_cnt_p27 <= ov_measure_resp_rx_timeout_cnt_p27 + 1'b1;
                    5'd28:ov_measure_resp_rx_timeout_cnt_p28 <= ov_measure_resp_rx_timeout_cnt_p28 + 1'b1;
                    5'd29:ov_measure_resp_rx_timeout_cnt_p29 <= ov_measure_resp_rx_timeout_cnt_p29 + 1'b1;
                    5'd30:ov_measure_resp_rx_timeout_cnt_p30 <= ov_measure_resp_rx_timeout_cnt_p30 + 1'b1;
                    5'd31:ov_measure_resp_rx_timeout_cnt_p31 <= ov_measure_resp_rx_timeout_cnt_p31 + 1'b1;
                    default:ov_measure_resp_rx_timeout_cnt_p31 <= ov_measure_resp_rx_timeout_cnt_p31;
                endcase
                rv_ipp_state    <= SELECT_MEASURE_PORT_S;
			end
			RECEIVE_RESP_ERROR_S:begin
			    rv_ipp_state    <= RECEIVE_RESP_ERROR_S;
			end			
            RECEIVE_RESP_S:begin
			    rv_byte_cnt        <= rv_byte_cnt + 1'b1;           
                if(rv_byte_cnt <= 8'd47)begin 
                    o_t2_wr    <= 1'b0;
                end
                else if(rv_byte_cnt <= 8'd57)begin
                    ov_t2          <= {ov_t2[71:0],iv_data[7:0]};
					if(rv_byte_cnt == 8'd57)begin
						o_t2_wr    <= 1'b1              ;
					end
					else begin
					    o_t2_wr    <= 1'b0;
					end
                end
                else begin
                    o_t2_wr    <= 1'b0;
                end
				
				if(i_data_wr)begin
				    rv_byte_cnt        <= rv_byte_cnt + 1'b1; 
                    rv_ipp_state       <= RECEIVE_RESP_S;					
				end
				else begin
				    rv_byte_cnt        <= 8'b0; 
                    rv_ipp_state       <= WAIT_RESP_FOLLOW_UP_S;				
				end
            end
            WAIT_RESP_FOLLOW_UP_S:begin
                ov_data         <= 9'b0;
				o_data_wr       <= 1'b0;
                
				o_t2_wr         <= 1'b0;
				if(rv_cycle_cnt >= 7'd124)begin
					rv_cycle_cnt <= 7'd0;
				end
				else begin
					rv_cycle_cnt <= rv_cycle_cnt + 7'd1;
				end	

				if(rv_us_cnt >= 10'd999)begin
					rv_us_cnt <= 10'd0;
				end
				else begin
					if(rv_cycle_cnt >= 7'd124)begin
						rv_us_cnt <= rv_us_cnt + 1'd1;
					end
					else begin
						rv_us_cnt <= rv_us_cnt;
					end
				end

				if(rv_us_cnt >= 10'd999)begin
					rv_ms_cnt <= rv_ms_cnt + 1'd1;
				end
				else begin
					rv_ms_cnt <= rv_ms_cnt;
				end	
				
				if(rv_ms_cnt <= (8'd1 << iv_measure_responder_wait_time))begin
					if(i_data_wr)begin				
					    if((iv_eth_type == 16'hff01) && (iv_tsmp_type == 8'h06) && (iv_tsmp_subtype == 8'h04) && (iv_port_id == {3'b0,ov_measure_port_id}))begin				
							rv_byte_cnt     <= 8'b1;
							rv_ipp_state    <= RECEIVE_RESP_FOLLOW_UP_S;
						end
						else begin
						    rv_byte_cnt     <= 8'b0;
							rv_ipp_state    <= RECEIVE_RESP_FOLLOW_UP_ERROR_S;
						end
					end
					else begin			
				        rv_byte_cnt     <= 8'b0;
					    rv_ipp_state    <= WAIT_RESP_FOLLOW_UP_S;
					end
				end
				else begin
				    rv_byte_cnt     <= 8'b0;
			        rv_ipp_state    <= WAIT_RESP_FOLLOW_UP_TIMEOUT_S;
				end				
            end 
			WAIT_RESP_FOLLOW_UP_TIMEOUT_S:begin
			    case(ov_measure_port_id)
                    5'd0 :ov_measure_resp_rx_timeout_cnt_p0  <= ov_measure_resp_rx_timeout_cnt_p0  + 1'b1;
                    5'd1 :ov_measure_resp_rx_timeout_cnt_p1  <= ov_measure_resp_rx_timeout_cnt_p1  + 1'b1;
                    5'd2 :ov_measure_resp_rx_timeout_cnt_p2  <= ov_measure_resp_rx_timeout_cnt_p2  + 1'b1;
                    5'd3 :ov_measure_resp_rx_timeout_cnt_p3  <= ov_measure_resp_rx_timeout_cnt_p3  + 1'b1;
                    5'd4 :ov_measure_resp_rx_timeout_cnt_p4  <= ov_measure_resp_rx_timeout_cnt_p4  + 1'b1;
                    5'd5 :ov_measure_resp_rx_timeout_cnt_p5  <= ov_measure_resp_rx_timeout_cnt_p5  + 1'b1;
                    5'd6 :ov_measure_resp_rx_timeout_cnt_p6  <= ov_measure_resp_rx_timeout_cnt_p6  + 1'b1;
                    5'd7 :ov_measure_resp_rx_timeout_cnt_p7  <= ov_measure_resp_rx_timeout_cnt_p7  + 1'b1;
                    5'd8 :ov_measure_resp_rx_timeout_cnt_p8  <= ov_measure_resp_rx_timeout_cnt_p8  + 1'b1;
                    5'd9 :ov_measure_resp_rx_timeout_cnt_p9  <= ov_measure_resp_rx_timeout_cnt_p9  + 1'b1;
                    5'd10:ov_measure_resp_rx_timeout_cnt_p10 <= ov_measure_resp_rx_timeout_cnt_p10 + 1'b1;
                    5'd11:ov_measure_resp_rx_timeout_cnt_p11 <= ov_measure_resp_rx_timeout_cnt_p11 + 1'b1;
                    5'd12:ov_measure_resp_rx_timeout_cnt_p12 <= ov_measure_resp_rx_timeout_cnt_p12 + 1'b1;
                    5'd13:ov_measure_resp_rx_timeout_cnt_p13 <= ov_measure_resp_rx_timeout_cnt_p13 + 1'b1;
                    5'd14:ov_measure_resp_rx_timeout_cnt_p14 <= ov_measure_resp_rx_timeout_cnt_p14 + 1'b1;
                    5'd15:ov_measure_resp_rx_timeout_cnt_p15 <= ov_measure_resp_rx_timeout_cnt_p15 + 1'b1;
                    5'd16:ov_measure_resp_rx_timeout_cnt_p16 <= ov_measure_resp_rx_timeout_cnt_p16 + 1'b1;
                    5'd17:ov_measure_resp_rx_timeout_cnt_p17 <= ov_measure_resp_rx_timeout_cnt_p17 + 1'b1;
                    5'd18:ov_measure_resp_rx_timeout_cnt_p18 <= ov_measure_resp_rx_timeout_cnt_p18 + 1'b1;
                    5'd19:ov_measure_resp_rx_timeout_cnt_p19 <= ov_measure_resp_rx_timeout_cnt_p19 + 1'b1;
                    5'd20:ov_measure_resp_rx_timeout_cnt_p20 <= ov_measure_resp_rx_timeout_cnt_p20 + 1'b1;
                    5'd21:ov_measure_resp_rx_timeout_cnt_p21 <= ov_measure_resp_rx_timeout_cnt_p21 + 1'b1;
                    5'd22:ov_measure_resp_rx_timeout_cnt_p22 <= ov_measure_resp_rx_timeout_cnt_p22 + 1'b1;
                    5'd23:ov_measure_resp_rx_timeout_cnt_p23 <= ov_measure_resp_rx_timeout_cnt_p23 + 1'b1;
                    5'd24:ov_measure_resp_rx_timeout_cnt_p24 <= ov_measure_resp_rx_timeout_cnt_p24 + 1'b1;
                    5'd25:ov_measure_resp_rx_timeout_cnt_p25 <= ov_measure_resp_rx_timeout_cnt_p25 + 1'b1;
                    5'd26:ov_measure_resp_rx_timeout_cnt_p26 <= ov_measure_resp_rx_timeout_cnt_p26 + 1'b1;
                    5'd27:ov_measure_resp_rx_timeout_cnt_p27 <= ov_measure_resp_rx_timeout_cnt_p27 + 1'b1;
                    5'd28:ov_measure_resp_rx_timeout_cnt_p28 <= ov_measure_resp_rx_timeout_cnt_p28 + 1'b1;
                    5'd29:ov_measure_resp_rx_timeout_cnt_p29 <= ov_measure_resp_rx_timeout_cnt_p29 + 1'b1;
                    5'd30:ov_measure_resp_rx_timeout_cnt_p30 <= ov_measure_resp_rx_timeout_cnt_p30 + 1'b1;
                    5'd31:ov_measure_resp_rx_timeout_cnt_p31 <= ov_measure_resp_rx_timeout_cnt_p31 + 1'b1;
                    default:ov_measure_resp_rx_timeout_cnt_p31 <= ov_measure_resp_rx_timeout_cnt_p31;
                endcase			    
                rv_ipp_state    <= SELECT_MEASURE_PORT_S;
			end
			RECEIVE_RESP_FOLLOW_UP_ERROR_S:begin
			    rv_ipp_state    <= RECEIVE_RESP_FOLLOW_UP_ERROR_S;
			end			
            RECEIVE_RESP_FOLLOW_UP_S:begin
			    rv_byte_cnt        <= rv_byte_cnt + 1'b1;           
                if(rv_byte_cnt <= 8'd47)begin 
                    o_t3_wr    <= 1'b0;
                end
                else if(rv_byte_cnt <= 8'd57)begin
                    ov_t3          <= {ov_t3[71:0],iv_data[7:0]};
					if(rv_byte_cnt == 8'd57)begin
						o_t3_wr    <= 1'b1              ;
					end
					else begin
					    o_t3_wr    <= 1'b0;
					end
                end
                else begin
                    o_t3_wr    <= 1'b0;
                end
				
				if(i_data_wr)begin
				    rv_byte_cnt        <= rv_byte_cnt + 1'b1; 
                    rv_ipp_state       <= RECEIVE_RESP_FOLLOW_UP_S;					
				end
				else begin
				    rv_byte_cnt        <= 8'b0; 
                    rv_ipp_state       <= SELECT_MEASURE_PORT_S;				
				end
            end			          
            default:begin
                ov_data         <= 9'b0;
				o_data_wr       <= 1'b0;			
			    o_t2_wr         <= 1'b0;
                o_t3_wr         <= 1'b0;
				rv_ipp_state    <= IDLE_S;  
            end
        endcase
    end
end
endmodule